AMD stopped selling chips and started selling racks

Here's the deal: on July 23 in San Francisco, at AMD's annual Advancing AI 2026 event, Lisa Su didn't hold up a GPU. She stood next to a rack roughly the height of a person. It's called Helios, and inside it are 72 Instinct MI455X GPUs, 18 sixth-generation EPYC "Venice" CPUs, AMD Pensando networking, a liquid cooling loop, and the whole ROCm software stack. AMD announced that Helios has entered full production.

That matters because the unit AMD sells just changed. For a decade the model was simple: AMD sold GPUs by the card, OEMs like Dell or Supermicro built the servers, and the customer figured out rack topology and networking on their own. Nvidia broke that model with GB200 NVL72, where a whole rack behaves as one enormous coherent GPU. Anyone training a frontier model stopped buying components. They buy finished compute units now.

AMD arrived at that party roughly three years late. This is the first time it has shown up with a comparable object — and not as a roadmap slide. As a thing coming off a production line with first shipments at the end of this quarter.

But the spec sheet wasn't the most interesting part of the day. OpenAI, Meta, and Anthropic all appeared on AMD's stage. Three frontier labs named as customers at a single semiconductor company's event is not a routine sight. Let's start there.

The cast — who built the rack, who's buying it

AMD first. Since Lisa Su took over in 2014, AMD has genuinely overtaken Intel in CPUs. In AI accelerators it has spent years as the company that exists but has no share. MI300X (2023), MI325X (2024), MI355X (2025) each posted attractive memory-capacity and performance-per-dollar numbers, and almost every large training cluster still went to Nvidia. The gap was never really the silicon. It was CUDA on top of it, and the networking stack that makes thousands of cards behave as one machine.

Look at what AMD has bought in the last two years and the direction is obvious. Pensando, which made data center DPUs and smart NICs. ZT Systems, which was essentially an acquisition of an entire server-design organization. Plus a string of software and compiler teams. A chip company deliberately assembling itself into a systems company. Helios is the announcement that the assembly is finished.

Instinct MI455X is the headline part. Built on TSMC's 2nm process, it carries 432GB of HBM4 per accelerator. AMD says peak MXFP8 and MXFP4 throughput reach up to 4× the previous-generation MI355X, and it leans hard on having roughly 50% more memory capacity than the competing part. Whether a large model fits entirely in GPU memory is, for anyone actually running inference, a far more practical question than any FLOPS chart.

Sixth-gen EPYC "Venice" is the other half of the rack. The top SKU runs 256 cores and 512 threads, and Helios packs 18 of them for about 4,600 CPU cores per rack. In modern AI racks the CPU is mostly "the thing that keeps the GPUs fed," but for agentic workloads — heavy tool calling, constant pre- and post-processing — that feeding is a real bottleneck more often than people expect.

The buyer list carries weight. AMD's announced deployments include OpenAI, Anthropic, Meta, Microsoft, Oracle, Saudi Arabia's HUMAIN, and GPU cloud operators Tensorwave, Vultr and Cirrascale. On the OEM side: Bull, HPE, Lenovo, Supermicro, Sanmina and Wiwynn. Frontier labs, hyperscalers, neoclouds, and sovereign projects — every layer is represented.

What's actually in the box

Here are the core specs, cross-checked across AMD's official blog and IR release against the spec breakdowns from Phoronix and Converge Digest.

Item Helios rack
GPUs 72 × Instinct MI455X
CPUs 18 × 6th Gen EPYC "Venice" (top SKU: 256 cores / 512 threads)
Total CPU cores ~4,600
Total GPU compute units ~18,000
GPU memory 432GB HBM4 each / ~31TB per rack
Peak performance ~2.9 exaFLOPS FP4, ~1.4 exaFLOPS FP8
Scale-up bandwidth Up to 260 TB/s (UALink over Ethernet)
Scale-out bandwidth Up to 43 TB/s
Networking AMD Pensando Salina DPU + Vulcano 800G AI NIC
Cooling Liquid
Process TSMC 2nm / 3nm mix
Status Full production, first shipments end of Q3

The number that matters most isn't the exaFLOPS. It's 31TB — total HBM in one rack. That figure decides whether a trillion-parameter-class model fits inside a single coherent domain, and the moment you have to cross a rack boundary, communication cost jumps hard enough to reshape real-world throughput. With Moonshot AI dropping the full 2.8-trillion-parameter Kimi K3 weights this very same day, "what fits in one rack" isn't a theoretical question. It's this week's operational question.

The second thing worth noticing is UALink over Ethernet. Nvidia binds GPUs inside a rack with NVLink, its own proprietary interconnect — closed, but fast and thoroughly proven. AMD chose the industry-consortium UALink standard running over Ethernet. It gives up some headroom in exchange for landing in data centers that already have a decade of Ethernet switches, cabling and operational muscle memory. When a hyperscaler says "we don't want to be locked to one vendor," this is the concrete thing they're asking for.

Third, AMD's own marketing number: up to 30% more tokens per dollar than the leading competitive solution. Read that carefully — it is not a claim of raw performance superiority. AMD is not saying it beat Nvidia on absolute throughput. It's saying you get more tokens for the same money. In a 2026 market where inference has overtaken training as the dominant cost line, that's a well-aimed sentence. It's also a vendor-measured figure, so treat it as directional until third-party numbers land.

Lisa Su framed it this way on stage: "The next phase of AI will span frontier models, agents and physical AI, creating new opportunities to bring intelligence everywhere." AMD also published the roadmap — the next-generation Instinct MI500 Series arrives in 2027, confirming AMD intends to match Nvidia's annual product cadence rather than the two-year rhythm it used to run.

What each side gets out of it

AMD gets a bigger unit price. Selling one GPU and selling one rack are entirely different revenue events. Fill the rack with your own CPUs, DPUs, NICs, switching and software and revenue per unit moves from hundreds of thousands to millions of dollars. More importantly, once a customer deploys a rack architecture, the next generation tends to be the same architecture. What AMD is really buying here isn't share. It's the starting point of lock-in.

OpenAI gets leverage and volume. OpenAI already holds an agreement covering up to six gigawatts of AMD accelerators, and Meta has a separate six-gigawatt deal — twelve gigawatts combined. AMD said it expects OpenAI to bring Helios online starting in Q4 2026, with deployments accelerating through 2027. For OpenAI this isn't merely about sourcing more chips. It structurally reduces the pricing and delivery risk of depending on a single supplier. Quotes read differently when there are two vendors in the room.

Anthropic showing up is the most interesting detail of the day. Anthropic has been unusually explicit about running a multi-silicon strategy — Google TPUs, AWS Trainium, and Nvidia in parallel. AMD becomes a fourth axis. What makes it sharper: in the same week, Anthropic declined to sign the open-weights letter that Jensen Huang amplified. So it's picking a policy fight with Nvidia while buying compute from Nvidia's largest competitor. The logic is entirely coherent once you separate the two tracks.

Microsoft and Oracle get cost structure. For a cloud provider, GPUs are cost of goods sold, and when there's exactly one supplier, that supplier sets your margin. Azure and OCI adopting Helios early isn't primarily a bet that AMD is better. The mere existence of a credible second source changes the negotiation with the first one.

Sovereign customers like HUMAIN get access. Between US export controls and allocation priority, Middle Eastern and Southeast Asian projects have often struggled to secure Nvidia's top parts in the volumes they want. A second supplier changes the arithmetic of standing in that line.

How these challenges have gone before

We've watched this movie. It has both endings.

The failures first. Since 2016, almost every AI accelerator challenge outside Google's TPU has died in software, not silicon. Intel's Nervana (acquired 2016, effectively wound down 2019) and the Habana Gaudi line are the canonical examples. Gaudi 2 and 3 always showed appealing performance-per-dollar on benchmark slides, and then actual developers tried to move their training scripts and hit a wall of unfamiliar kernel optimizations, distributed-training libraries and debugging tools. Graphcore brought a genuinely different architecture in the IPU and ended up acquired by SoftBank. The ecosystem decided these fights, not the spec sheets.

The success story belongs to AMD itself. Starting with the Zen architecture in 2017, EPYC actually took server CPU share away from Intel. Note how that went: the first generation, Naples, had good silicon and slow real-world adoption because platform validation was thin. Trust accumulated with Rome, and by Milan and Genoa the hyperscalers migrated at scale. The decisive factor was shipping three consecutive generations on the promised cadence. Not one home run — three hits in a row.

There's a third case worth holding in mind: Google TPU. TPU succeeded not because the chip was extraordinary but because Google was a single customer willing and able to rewrite its own workloads to fit the silicon. Alternative accelerators survive when a customer large enough absorbs the porting cost, not when the hardware is easy for everyone. With OpenAI and Meta locked into gigawatt-scale commitments, AMD is now in exactly that condition. That's the decisive difference from the failure cases: AMD isn't closing the software gap alone. Its customers are assigning their own engineers to close it alongside.

How Nvidia counters

Nvidia has several cards and most are already in hand.

Cadence. Nvidia has published its path from Blackwell Ultra through the Rubin generation. The rhythm is that by the time AMD reaches parity with a given part, Nvidia has the next one on the floor. The structural risk for any fast follower is that "we caught up" always lands one generation late — which is exactly why AMD nailing MI500 to 2027 matters as much as anything it announced this week.

CUDA. Still the deepest moat, but its character is shifting. Frontier labs now employ teams that write kernels directly against PyTorch, run Triton, and maintain their own compilers, so their CUDA dependency is far shallower than a typical enterprise's. Mid-market companies and startups, meanwhile, have neither the reason nor the headcount to leave CUDA. That's why AMD's early penetration concentrates on frontier labs and large clouds — going where the moat is shallowest is the only sequence that makes sense.

Bundling and allocation. Nvidia doesn't sell GPUs alone. It sells NVLink switching, InfiniBand and Spectrum-X networking, NIM inference software, and increasingly its own cloud investments as a package. In a supply-constrained market, controlling "next quarter's allocation" is enormous leverage. That card is also getting riskier from an antitrust standpoint, and it's precisely why customers want a second source so badly.

Price. Nvidia's data center margins leave a lot of room. If AMD claims a 30% tokens-per-dollar advantage, Nvidia can selectively adjust pricing in contested segments and erase it. Good for buyers, and the single most painful scenario for AMD.

And don't forget AMD isn't only fighting Nvidia. Google TPU, AWS Trainium, and Microsoft Maia keep eating internal hyperscaler volume. The "second source" seat AMD wants is one the cloud providers are actively trying to fill themselves.

What actually changes for you

If you ship AI services, nothing changes today. First Helios units go out at the end of Q3 and won't surface as cloud instances until Q4 at the earliest. But there's a decent chance "MI455X instances" appear on Azure, OCI or Tensorwave price sheets within six to twelve months. When that happens, the thing to check isn't a benchmark chart — it's whether your code runs on it unchanged. If you live on standard PyTorch APIs, porting cost is lower than you'd guess. If you lean on hand-written CUDA kernels, it's meaningfully higher. Worth finding out now rather than then.

If you're a startup CTO, the practical change is one more card in your inference-cost negotiation. Until now, asking a GPU cloud for pricing produced exactly one answer. "Quote me the AMD option too" is now a sentence that means something. Workloads with long contexts or large models — full-codebase analysis, long-document summarization, long-running agents — are where memory capacity translates directly into cost, so 432GB of HBM4 is where you'd feel it first.

If you invest in semis or infrastructure, the metric to watch isn't the launch slide. It's AMD's data center revenue and inventory turns over the next two quarters. "Entering production" and "recognizing revenue" are different events, and initial shipments realistically book in Q4. Also note that twelve gigawatts is a ceiling on contracted capacity, not a committed shipment number. The option exercise rate is what determines the real figure.

From a Korean market angle, the story is memory. Seventy-two GPUs at 432GB of HBM4 each means one rack consumes roughly 31TB of HBM, and that volume flows to SK hynix and Samsung. It's not a coincidence that Korean firms announced $950 billion in AI partnerships in San Francisco the same week. Whether the rack war is won by Nvidia or AMD, the HBM demand curve moves the same direction. For Korean memory makers this announcement isn't competitive news. It's pure demand.

If you're just a user, the effect is slow and indirect. But falling inference cost eventually shows up in subscription tiers and free quotas. One reason chatbot pricing hasn't climbed much over the past two years is accelerator competition — this is the kind of news that quietly lands on your bill a few quarters later.

🥄 Three Things You're Probably Wondering

— So did AMD actually beat Nvidia? No, not remotely. Nvidia still takes the overwhelming majority of AI accelerator revenue, and Helios is only now shipping its first units. The accurate framing is that AMD is in the same ring for the first time. Being in the ring and winning are different things, and the scorecard comes from 2027 deployment numbers.

— Should I trust the "30% more tokens per dollar" claim? It's a vendor measurement under vendor-chosen conditions. Which model, which batch size, which precision — all of it swings the result substantially. Until MLPerf-style third-party results or operational data from real deployments arrive, treat it as directional only. That said, the fact AMD framed the pitch around economics rather than raw performance shows it read the market correctly.

— Why is Anthropic being on that stage news? Anthropic is unusually determined not to be locked to a single compute vendor — it already runs Google TPUs, AWS Trainium and Nvidia in parallel, and AMD now joins that mix. Put it next to Anthropic declining to sign Nvidia's open-weights letter the same week and you see a company that fully separates its policy positions from its procurement strategy. Contract size and terms weren't disclosed, though, so reading much beyond "they showed up" is premature.

References

Numbers and criteria are as of announcement and may change.