Chey Tae-won Met TSMC's C.C. Wei After Two Years — SK hynix and TSMC Tighten Their Grip on HBM4 and Packaging

The memory #1 and the foundry #1 linked arms even tighter — here's why it matters

Here's the deal: on June 3, SK Group chairman Chey Tae-won flew to Taiwan and met TSMC chairman and CEO C.C. Wei — their first in-person meeting since June 2024. It wasn't a courtesy call. While discussing next-gen AI tech trends, they agreed to widen cooperation across next-generation HBM development and advanced packaging.

The center of it is HBM4 — SK hynix's sixth-generation HBM, the very memory going into NVIDIA's next-gen accelerator "Vera Rubin." And there's a decisive change: through HBM3E, SK hynix made the base die (the control chip at the very bottom of an HBM stack) in-house; from HBM4, it outsources that to TSMC. TSMC builds the base die on a 12nm process, and SK hynix stacks its fifth-gen 10nm-class (1b) DRAM on top.

The other big theme is "advanced packaging." In the AI era, the chip bottleneck is shifting from "how well you make it" (front-end) to "how well you bond it" (back-end / packaging). Memory #1 SK hynix and foundry-and-packaging #1 TSMC joining hands here means the two most important pillars of the AI chip supply chain are now lashed together more firmly.

The cast — who's who

Start with SK hynix, king of the HBM (high-bandwidth memory) market. One of the AI boom's biggest winners, it has been the leading supplier of HBM for NVIDIA GPUs since HBM3E and still leads in next-gen HBM4. But as HBM grows more complex, dividing labor with a top partner beats doing every process alone.

Next is TSMC, the world's #1 foundry. It makes NVIDIA's GPUs and Apple's chips. But TSMC's real weapon isn't just chip-making — it's advanced packaging. Its CoWoS technology precisely bonds GPU and HBM in one package, which is central to AI chip performance. The real reason AI chips are scarce isn't "no GPUs" but "not enough TSMC packaging capacity" — packaging is the bottleneck.

Third — never on stage but effectively the lead — is NVIDIA, the final customer of all this. NVIDIA takes HBM from SK hynix and hands GPU fabrication and packaging to TSMC to build finished products like Vera Rubin. So SK hynix–TSMC cooperation is, in the end, coordination "to supply NVIDIA better and in greater volume." The triangle's three vertices are SK, TSMC, and NVIDIA.

And the meeting's principals, Chey Tae-won and C.C. Wei. Two group-chairman-level leaders meeting directly signals this is "group strategy," beyond the working level.

What exactly happened

Let's get the facts straight. On June 3 in Taiwan, Chey and Wei discussed next-gen AI tech trends and AI-ecosystem cooperation, agreeing to broaden collaboration into next-gen HBM development and advanced packaging. SK hynix had already signed an MoU with TSMC and is integrating HBM with TSMC's logic process and packaging. The first focus is improving the base die at the bottom of the HBM stack.

Unpack the tech. HBM stacks DRAM in many layers with a "base die" — a control chip — at the bottom. That base die acts as the brain relaying signals between GPU and DRAM. Through HBM3E, SK hynix made it on its own memory process; from HBM4, as finer, smarter logic is needed, it moves to TSMC's 12nm logic process. The judgment: rather than a memory company building the logic chip too, leaving it to logic-leader TSMC is better for performance and efficiency.

Item	Detail
Meeting date	June 3, 2026 (Taiwan)
Principals	Chey Tae-won (SK Chairman) ↔ C.C. Wei (TSMC Chairman/CEO)
Significance	First in-person meeting since June 2024
Agreement	Next-gen HBM development + expanded advanced-packaging cooperation
HBM4 structure	TSMC 12nm base die + SK hynix 5th-gen 10nm-class (1b) DRAM
Key shift	Base die in-house through HBM3E → outsourced to TSMC from HBM4
End demand	NVIDIA next-gen accelerator "Vera Rubin"
Packaging	Optimize HBM with TSMC CoWoS, serve common customers

The picture: a sharper division of labor where SK hynix focuses on memory, TSMC handles logic base dies and packaging, and NVIDIA takes the finished product. Each does what it does best to build the AI chip together.

What each side gets

SK hynix's gain is "cementing the HBM throne." As HBM4 grows complex and the base die needs high-performance logic, leaving it to logic-leader TSMC lets SK hynix focus on its strength — DRAM. The result: a faster, more efficient HBM4 it can ship to NVIDIA first. Dividing labor with the best partner and moving fast beats trying to do everything alone and falling behind, which is what throne-defense requires.

TSMC's gain is "owning even deeper in the AI value chain." TSMC already holds GPU fabrication and packaging; now making HBM's base die too means it captures more value per AI chip. GPU, packaging, and memory base die all route through TSMC. The structure where nothing in AI silicon moves without TSMC only gets stronger.

NVIDIA's gain is "supply stability." When two of its key suppliers (SK hynix, TSMC) coordinate directly, the risk of production hiccups in finished products like Vera Rubin drops. Pre-empting the bottlenecks and defects that arise when suppliers work in isolation is great news for the end customer. The tighter the triangle, the steadier NVIDIA's shipments.

It matters for Korea and Taiwan too. This cooperation reaffirms that the core of the AI chip supply chain is split between Korea (memory) and Taiwan (foundry/packaging). Amid US-China tension, a tighter Korea-Taiwan semiconductor alliance grows both countries' leverage in the global AI supply chain.

History check — memory × foundry cooperation, wins and losses

This "memory company plus foundry" collaboration is becoming the new standard of the HBM era. The success starting point is the history of SK hynix–TSMC cooperation itself. The two already coordinated on HBM base dies and packaging, which helped SK hynix hold #1 in HBM. The NVIDIA–SK hynix–TSMC triangle is cited as the most stable supply system throughout the AI boom. This meeting extends and strengthens that proven alliance into the HBM4 generation.

The counter-example is the limits of "vertical integration (doing it all alone)." Samsung is a full-line chipmaker with memory, foundry, and packaging in-house — but that isn't always an advantage. Samsung's struggle with NVIDIA certification on HBM3E is a prime example. Trying to do everything internally can mean you don't optimize each process as well as an external #1 partner. SK hynix choosing "DRAM by me, logic base die by TSMC" is a strategy to shed integration burden and partner with the best in each area.

But division of labor has shadows too. Depending on outsiders for a core part brings supply-chain risk and tech dependence. Outsourcing the base die to TSMC means SK hynix is affected if TSMC's capacity tightens or it falls in priority. And TSMC can also work with SK hynix's rivals (e.g., Micron), so it's a delicate relationship where cooperation and rivalry coexist. The key is keeping a balance — neither too dependent nor too distant.

Competitor counter-plays — how do the others respond?

The most direct rival is Samsung. As the only company with memory, foundry, and packaging all in-house, Samsung counters with a one-stop strategy: "we solve everything from HBM to packaging in one company." While SK hynix divides labor with TSMC, Samsung will try to win more NVIDIA volume on the synergy of internal integration. But having stumbled once on HBM3E, its task is to prove real performance and yield on HBM4.

Micron is a variable too. The US memory maker recently joined as an HBM4 supplier and is chasing, but Micron also depends on outside packaging like TSMC's. So as SK hynix and TSMC bind tighter, Micron faces the burden of competing with SK hynix for TSMC capacity. Micron's counter is the "US-made supply" geopolitical card plus strengthening its own packaging capability.

Intel and America's packaging push can't be ignored. With packaging now the AI-era bottleneck, the US is trying to grow domestic advanced-packaging capacity. Intel pushes its own packaging (Foveros, etc.), and there's even talk of SK hynix building a packaging plant in the US. A US-led move to check "TSMC packaging dominance" is growing — a long-term variable for the SK-TSMC alliance.

So what actually changes — by audience

For semiconductor investors, the key is "the center of gravity in HBM competition is shifting to packaging." It used to be that "the company that stacks DRAM well" was the HBM leader; now "packaging that bonds GPU and HBM well" is the real bottleneck and value source. So weigh whose approach is more efficient — TSMC's packaging capacity, SK hynix's division of labor, or Samsung's integration. Just remember this meeting is "an agreement to expand cooperation," not an announcement of specific volumes or figures.

For those running AI infrastructure, this lands as "supply stability." The tighter the SK hynix–TSMC–NVIDIA triangle, the lower the risk of production disruption for accelerators like Vera Rubin. The "AI chips are impossible to get" situation could ease a bit. When suppliers move in sync, the chip supply to the data center at the end stabilizes too.

For general observers, grab the big picture: "AI chips are built by an alliance, not one company." A single NVIDIA-branded chip contains SK hynix memory and TSMC fabrication and packaging. The AI supremacy race is really a fight over "who assembles the stronger supply alliance." This Chey-Wei meeting is one scene of binding that alliance tighter. Not dramatic overnight, but it shapes AI-chip supply stability and the standing of Korean and Taiwanese semiconductors over the long run.

FAQ

Q. What's a base die, and why is outsourcing it to TSMC a big deal? A. The base die sits at the bottom of an HBM stack and relays signals between GPU and DRAM. From HBM4, it needs finer, smarter logic, which logic-leader TSMC makes better. A memory company (SK) handing the logic chip to a logic specialist is a meaningful division of labor.

Q. Doesn't that make SK hynix dependent on TSMC? A. Some dependence does arise — if TSMC's capacity tightens, SK is affected. But SK chose "division of labor," focusing on its DRAM strength while borrowing TSMC's logic capability. The key is balance: neither too dependent nor too distant.

Q. Did the meeting produce a specific contract or dollar figure? A. No. The June 3 meeting was an agreement to expand cooperation. No specific volume split or figures were disclosed. Read it as a strategic agreement on broad direction.

Q. Is Samsung left out of this? A. Samsung has memory, foundry, and packaging all in-house, so it goes integrated — "solve it all in one company" — rather than dividing labor with outsiders. It chose a different path from this SK-TSMC cooperation. Which strategy wins on HBM4 will be decided by actual performance and yield.

References

• SK hynix Partners With TSMC to Strengthen HBM Technological Leadership — SK hynix Newsroom
• SK Group Chair Chey Tae-won Meets TSMC Chairman C.C. Wei After Two Years — TrendForce
• HBM4 supply in focus as SK's Chey meets TSMC's Wei — DIGITIMES
• SK hynix Collaborates with TSMC on HBM4 Chip Packaging — TechPowerUp
• SK Hynix Partners With TSMC On HBM4 Memory & Next-Gen Packaging Technology — Wccftech

This article is not investment advice. The technical structure and process details reflect company announcements and press reports and may differ from reality. The meeting was an agreement to expand cooperation, and specific contract terms were not disclosed. Make decisions at your own discretion and risk.